7-209 advanced dmos technology these enhancement-mode (normally-off) transistors utilize a vertical dmos structure and supertexs well-proven silicon-gate manufacturing process. this combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in mos devices. characteristic of all mos structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. vn2406 VN2410 bv dss /r ds(on) i d(on) bv dgs (max) (min) to-92 240v 6.0 w 1.0a vn2406l 240v 10 w 1.0a VN2410l order number / package n-channel enhancement-mode vertical dmos fets package options note: see package outline section for dimensions. to-92 ordering information features n n free from secondary breakdown n n low power drive requirement n n ease of paralleling n n low c iss and fast switching speeds n n excellent thermal stability n n integral source-drain diode n n high input impedance and high gain n n complementary n- and p-channel devices absolute maximum ratings drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds. applications n n motor controls n n converters n n amplifiers n n switches n n power supply circuits n n drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) s g d
7-210 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 10v v dd r gen 0v 0v thermal characteristics vn2406/VN2410 symbol parameter min typ max unit conditions bv dss 240 v gs(th) gate threshold voltage 0.8 2 v v gs = v ds , i d = 1ma i gss gate body leakage 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current 10 v gs = 0v, v ds = 120v 500 m av gs = 0v, v ds = 120v t a = 125 c i d(on) on-state drain current 1.0 a v gs = -10v, v ds = 15v r ds(on) all 10 v gs = 2.5v, i d = 0.1a VN2410 10 w v gs = 10v, i d = 0.5a vn2406 6 v gs = 10v, i d = 0.5a d r ds(on) change in r ds(on) with temperature 1.0 1.4 %/ cv gs = 10v, i d = 0.55a g fs forward transconductance 300 m v ds = 10v, i d = 0.5a c iss input capacitance 125 c oss common source output capacitance 50 pf c rss reverse transfer capacitance 20 t d(on) turn-on delay time 8 t r rise time 8 t d(off) turn-off delay time 23 t f fall time 24 v sd diode forward voltage drop VN2410 1.2 v v gs = 0v, i sd = 0.19a vn2406 1.2 v v gs = 0v, i sd = 0.8a notes: 1. all d.c. parameters 100% tested at 25 c unless otherwise stated. (pulse test: 300 m s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. vv gs = 0v, i d = 0.1ma drain-to-source breakdown voltage static drain-to-source on-state resistance v gs = 0v, v ds = 25v f = 1 mhz electrical characteristics (@ 25 c unless otherwise specified) v dd = 60v i d = 0.4a r gen = 25 w ns switching waveforms and test circuit w package i d (continuous)* i d (pulsed) power dissipation q jc q ja i dr *i drm @ t c = 25 c c/w c/w to-92 0.9a 5.0a 1.0w 125 170 0.18a 1.7a * i d (continuous) is limited by max rated t j .
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